• Encrypt data traffic, using smartcards, in laptops (mobile business)

• A laptop smartcard reader/writer

• Access control for laptops

• Development platform for your own DVB encoding systems

Information

The CAM Modules are the digital equivalent to an analogue decoder. Their function is to restrict access to various channel bouquets - the broadcaster supplies a card to allow you access their stations! The usual restrictions are applied where you live.

The existing decoding systems for CAMs are namely: Irdeto, Betacrypt, Viaccess, Mediaguard (Astoncrypt - Seca), Conax, Cryptoworks, Nagravision, AlphaCrypt, Universal.

Rarely, if ever, a CAM is on its own enough to give you access to a station, most likely you'll need a card too.

The Matrix Cam is a all in one type of cam, in short one cam for all the above systems, as well as being used for security for Laptops.

5 main processors:
IC1 - 144 pins - SIDSA MACTSP 0234 56524A - R2G6632 ( WEB Site)
SIDSA's MACtsp multimedia engine is a high performance ARM7TDMITM based single-chip which requires very few external components (SRAM, FLASH and Smart Card Driver). Indeed several Conditional Access Systems (CAS) can be quickly implemented on the same engine using our associated software development tools and reference designs.
Click here for the SIDSA_MAC_TSP_Multimedia_Engine.pdf

IC2 - 48 pins - M29W160DB - 16 Mbit (2Mb x8 or 1Mb x16, Boot Block)
3V Supply Flash Memory. The M29W160D is a 16 Mbit (2Mb x8 or 1Mb x16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. The blocks in the memory are asymmetrically arranged. The first or last 64 Kbytes have been divided into four additional blocks. The 16 Kbyte Boot Block can be used for small initialization code to start the microprocessor, the two 8 Kbyte Parameter Blocks can be used for parameter storage and the remaining 32K is a small Main Block where the application may be stored. Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic. The memory is offered in SO44, TSOP48 (12 x 20mm) and TFBGA48 (0.8mm pitch) packages. The memory is supplied with all the bits erased set to ’1’).
Click here for the M29W160DB.pdf file

IC3 - 44 pins - Xilinx - XC9536XL (WEB Site) - The XC9536XL is a 3.3V CPLD targeted for high-performance, low-voltage applications in leading-edge communications and computing systems. It is comprised of two 54V18 Function Blocks, providing 800 usable gates with propagation delays of 5 ns.
Click here for the ds058.pdf file

IC4 - 32 pins - B002C - 8174S

IC5 - 44 pins - Alliance - AS7C34098-15TC is a 3.3V 256K x 16 CMOS SRAM, access time 15ns made by Alliance Semiconductor Corporation. The AS7C34098 is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) devices organized as 262,144 words × 16 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.
Click here for the AS7C4098.pdf file